At the recent International Memory Workshop (IMW 2024) in Seoul, South Korea, Kioxia took center stage to delve into the intricate world of enhancing the storage density of 3D NAND flash memory.
With a bold projection, Kioxia envisions that by 2027, the storage density will skyrocket to 100Gbit/mm2, achieved through the incorporation of 1,000 word line stacks.
PC Watch, in its coverage of Kioxia’s keynote, highlights the implications of such a leap. A density of 100Gbit/mm2 translates to remarkable potential – a mere silicon die spanning 64 square millimeters could house a whopping 6.4 Tbit (or around 800 GB) of data. Scale this up to a package containing eight such dies, and voilà, you have a colossal 6,400GB at your fingertips. Extend this further to flash storage boasting four packages, and the result is a staggering 25.6TB. Imagine, by 2028, a 20TB SSD could hit the market, priced competitively at $250 to $350, posing a formidable challenge to 20TB HDDs.
Yet, the road to such astounding density is not without its obstacles. Kioxia acknowledges the complexities involved in achieving 1,000 layers by 2027, particularly in creating channel holes that pierce through the stacked word lines. Enter advanced etching techniques like low-temperature RIE (Reactive Ion Etching), essential for managing the daunting aspect ratio of these deep holes. Moreover, concerns arise regarding channel resistance and signal noise as layers deepen, prompting a potential shift from polycrystalline to single-crystal silicon, courtesy of MILC (Metal Induced Lateral Crystallization) technology. This shift could herald a doubling of cell current, thereby enhancing performance.
But wait, there’s more. Merely stacking word lines won’t suffice; innovative approaches are necessary to maximize storage density. Enter the “staircase” dilemma – the area occupied by vertical electrodes. To combat this, strategies like combining vertical electrodes and transitioning from TLC (3 bits/cell) to QLC (4 bits/cell) come into play, promising a significant density boost. Yet, the quest for denser storage doesn’t stop here; multilevel processing, such as PLC (5 bits/cell), HLC (6 bits/cell), and HeLC (8 bits/cell), holds the key to even greater heights.
But, as they say, with great stacks comes great responsibility – or rather, increased delay times due to resistance and capacitance. To counteract this, Kioxia explores avenues like reducing stacking pitch and switching the word line metal material from tungsten to molybdenum, offering potential solutions to these challenges.
While the journey towards achieving petabyte SSDs is fraught with challenges, Kioxia and its competitors, like Samsung, remain undeterred. They understand that future breakthroughs will demand relentless innovation and the harnessing of new technologies to maintain the blistering pace of progress.
